1. Field of the Invention
This invention relates to the field of data processing systems. More particularly, this invention relates to data processing systems which pre-decode instructions and store the pre-decoded instructions within a cache.
2. Description of the Prior Art
It is known to provide data processing systems which pre-decode instructions and then store the pre-decoded instructions within a cache. The pre-decoded instructions can then be read from the cache and fully decoded and issued for execution as required by the program flow. The use of such a pre-decoding technique and cache for storing pre-decoded instructions has a number of benefits, such as reduced energy consumption when the same instructions are repeatedly executed, simplified decoding, which can be performed more rapidly when the pre-decoded instructions are read from the cache, etc.
A problem which arises within such systems is that a pre-decoded instruction may cross a boundary between adjacent (contiguous) cache lines within the cache. Thus, a first portion of a pre-decoded instruction may be stored within a first cache line and a second portion of a pre-decoded instruction may be stored in an adjacent second cache line. The finite capacity of the cache for storing the pre-decoded instructions has the consequence that some form of cache eviction mechanism will be provided in order to ensure that as new pre-decoded instructions are generated in accordance with the program flow, then these new pre-decoded instructions can be allocated space within the cache.
A consequence of cache evictions of pre-decoded instructions is that it is possible for one portion of a pre-decoded instruction which crosses a cache line boundary to be evicted while the other portion remains in place. Subsequently, when the pre-decoded instructions are being read from the cache memory and a pre-decoded instruction which crosses a cache line boundary is being read, then it is possible that one of the portions may be been evicted. Furthermore, it is also possible that one of the portions may have been evicted and then reloaded, but in an altered form. This presents a difficulty as it may appear that both portions of the pre-decoded instruction are properly present within the cache on either side of the cache line boundary, but in reality incorrect operation may result as a consequence of the two portions of the pre-decoded instruction having been generated from different instructions, i.e. the initial instruction and a subsequently modified instruction present when a re-fetch occurred.
The present invention both recognises and addresses this problem.